Package details
| Package | verilator-doc |
|---|---|
| Version | 5.030-r0 |
| Description | Convert Verilog and SystemVerilog to C++ or SystemC (documentation) |
| Project | https://verilator.org |
| License | LGPL-3.0-only |
| Branch | v3.21 |
| Repository | community |
| Architecture | x86_64 |
| Size | 10.9KiB |
| Installed size | 8.9KiB |
| Origin | verilator |
| Maintainer | Sören Tempel |
| Build time | 2024-11-07 23:14:55 |
| Commit | 608c388b43520ad7d7db1cae87dae69d4435ea03 | Merge request | 74820 |
| Git repository | Git repository |
| Build log | Build log |
| Contents | Contents of package |