Package details
| Package | verilator-doc |
|---|---|
| Version | 5.024-r0 |
| Description | Convert Verilog and SystemVerilog to C++ or SystemC (documentation) |
| Project | https://verilator.org |
| License | LGPL-3.0-only |
| Branch | v3.20 |
| Repository | community |
| Architecture | x86_64 |
| Size | 10.8KiB |
| Installed size | 40.0KiB |
| Origin | verilator |
| Maintainer | Sören Tempel |
| Build time | 2024-04-06 12:03:21 |
| Commit | b39295bd6e940656e1870c7c8bf7c1563e08ee2c | Merge request | 63626 |
| Git repository | Git repository |
| Build log | Build log |
| Contents | Contents of package |