Package details
| Package | verilator-doc |
|---|---|
| Version | 5.018-r0 |
| Description | Convert Verilog and SystemVerilog to C++ or SystemC (documentation) |
| Project | https://verilator.org |
| License | LGPL-3.0-only |
| Branch | v3.19 |
| Repository | community |
| Architecture | x86 |
| Size | 10.5KiB |
| Installed size | 40.0KiB |
| Origin | verilator |
| Maintainer | Sören Tempel |
| Build time | 2023-11-02 13:50:26 |
| Commit | 564578a3d7c4b90885fb62a3be94a863740aa799 | Merge request | 54601 |
| Git repository | Git repository |
| Build log | Build log |
| Contents | Contents of package |