Package details
| Package | verilator-doc |
|---|---|
| Version | 5.010-r0 |
| Description | Convert Verilog and SystemVerilog to C++ or SystemC (documentation) |
| Project | https://verilator.org |
| License | LGPL-3.0-only |
| Branch | v3.18 |
| Repository | community |
| Architecture | x86_64 |
| Size | 12.4KiB |
| Installed size | 40.0KiB |
| Origin | verilator |
| Maintainer | Sören Tempel |
| Build time | 2023-05-02 19:48:30 |
| Commit | 2564ba3f286e31925ec1bdb4342396d8796b97c6 | Merge request | 46653 |
| Git repository | Git repository |
| Build log | Build log |
| Contents | Contents of package |