Package details
| Package | verilator-doc |
|---|---|
| Version | 5.032-r0 |
| Description | Convert Verilog and SystemVerilog to C++ or SystemC (documentation) |
| Project | https://verilator.org |
| License | LGPL-3.0-only |
| Branch | edge |
| Repository | community |
| Architecture | x86_64 |
| Size | 10.9KiB |
| Installed size | 9.0KiB |
| Origin | verilator |
| Maintainer | Sören Tempel |
| Build time | 2025-01-02 16:20:56 |
| Commit | 88548e6038e2a95c9c9f0367df7400cb02f2c32a | Merge request | 77907 |
| Git repository | Git repository |
| Build log | Build log |
| Contents | Contents of package |