Contents filter
| File | Package | Branch | Repository | Architecture |
|---|---|---|---|---|
| /usr/lib/python3.12/site-packages/pythondata_cpu_vexriscv-1.0.1.post314.dist-info/METADATA | py3-litex-hub-pythondata-cpu-vexriscv | edge | testing | aarch64 |
| /usr/lib/python3.12/site-packages/pythondata_cpu_vexriscv-1.0.1.post314.dist-info/RECORD | py3-litex-hub-pythondata-cpu-vexriscv | edge | testing | aarch64 |
| /usr/lib/python3.12/site-packages/pythondata_cpu_vexriscv-1.0.1.post314.dist-info/WHEEL | py3-litex-hub-pythondata-cpu-vexriscv | edge | testing | aarch64 |
| /usr/lib/python3.12/site-packages/pythondata_cpu_vexriscv-1.0.1.post314.dist-info/top_level.txt | py3-litex-hub-pythondata-cpu-vexriscv | edge | testing | aarch64 |
| /usr/lib/python3.12/site-packages/pythondata_cpu_vexriscv/__init__.py | py3-litex-hub-pythondata-cpu-vexriscv | edge | testing | aarch64 |
| /usr/lib/python3.12/site-packages/pythondata_cpu_vexriscv/verilog/.gitignore | py3-litex-hub-pythondata-cpu-vexriscv | edge | testing | aarch64 |
| /usr/lib/python3.12/site-packages/pythondata_cpu_vexriscv/verilog/.gitmodules | py3-litex-hub-pythondata-cpu-vexriscv | edge | testing | aarch64 |
| /usr/lib/python3.12/site-packages/pythondata_cpu_vexriscv/verilog/Makefile | py3-litex-hub-pythondata-cpu-vexriscv | edge | testing | aarch64 |
| /usr/lib/python3.12/site-packages/pythondata_cpu_vexriscv/verilog/README.md | py3-litex-hub-pythondata-cpu-vexriscv | edge | testing | aarch64 |
| /usr/lib/python3.12/site-packages/pythondata_cpu_vexriscv/verilog/VexRiscv.v | py3-litex-hub-pythondata-cpu-vexriscv | edge | testing | aarch64 |
| /usr/lib/python3.12/site-packages/pythondata_cpu_vexriscv/verilog/VexRiscv.yaml | py3-litex-hub-pythondata-cpu-vexriscv | edge | testing | aarch64 |
| /usr/lib/python3.12/site-packages/pythondata_cpu_vexriscv/verilog/VexRiscv_Debug.v | py3-litex-hub-pythondata-cpu-vexriscv | edge | testing | aarch64 |
| /usr/lib/python3.12/site-packages/pythondata_cpu_vexriscv/verilog/VexRiscv_Debug.yaml | py3-litex-hub-pythondata-cpu-vexriscv | edge | testing | aarch64 |
| /usr/lib/python3.12/site-packages/pythondata_cpu_vexriscv/verilog/VexRiscv_Full.v | py3-litex-hub-pythondata-cpu-vexriscv | edge | testing | aarch64 |
| /usr/lib/python3.12/site-packages/pythondata_cpu_vexriscv/verilog/VexRiscv_Full.yaml | py3-litex-hub-pythondata-cpu-vexriscv | edge | testing | aarch64 |
| /usr/lib/python3.12/site-packages/pythondata_cpu_vexriscv/verilog/VexRiscv_FullDebug.v | py3-litex-hub-pythondata-cpu-vexriscv | edge | testing | aarch64 |
| /usr/lib/python3.12/site-packages/pythondata_cpu_vexriscv/verilog/VexRiscv_FullDebug.yaml | py3-litex-hub-pythondata-cpu-vexriscv | edge | testing | aarch64 |
| /usr/lib/python3.12/site-packages/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v | py3-litex-hub-pythondata-cpu-vexriscv | edge | testing | aarch64 |
| /usr/lib/python3.12/site-packages/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.yaml | py3-litex-hub-pythondata-cpu-vexriscv | edge | testing | aarch64 |
| /usr/lib/python3.12/site-packages/pythondata_cpu_vexriscv/verilog/VexRiscv_LinuxDebug.v | py3-litex-hub-pythondata-cpu-vexriscv | edge | testing | aarch64 |
| /usr/lib/python3.12/site-packages/pythondata_cpu_vexriscv/verilog/VexRiscv_LinuxDebug.yaml | py3-litex-hub-pythondata-cpu-vexriscv | edge | testing | aarch64 |
| /usr/lib/python3.12/site-packages/pythondata_cpu_vexriscv/verilog/VexRiscv_LinuxNoDspFmax.v | py3-litex-hub-pythondata-cpu-vexriscv | edge | testing | aarch64 |
| /usr/lib/python3.12/site-packages/pythondata_cpu_vexriscv/verilog/VexRiscv_Lite.v | py3-litex-hub-pythondata-cpu-vexriscv | edge | testing | aarch64 |
| /usr/lib/python3.12/site-packages/pythondata_cpu_vexriscv/verilog/VexRiscv_Lite.yaml | py3-litex-hub-pythondata-cpu-vexriscv | edge | testing | aarch64 |
| /usr/lib/python3.12/site-packages/pythondata_cpu_vexriscv/verilog/VexRiscv_LiteDebug.v | py3-litex-hub-pythondata-cpu-vexriscv | edge | testing | aarch64 |
| /usr/lib/python3.12/site-packages/pythondata_cpu_vexriscv/verilog/VexRiscv_LiteDebug.yaml | py3-litex-hub-pythondata-cpu-vexriscv | edge | testing | aarch64 |
| /usr/lib/python3.12/site-packages/pythondata_cpu_vexriscv/verilog/VexRiscv_Min.v | py3-litex-hub-pythondata-cpu-vexriscv | edge | testing | aarch64 |
| /usr/lib/python3.12/site-packages/pythondata_cpu_vexriscv/verilog/VexRiscv_Min.yaml | py3-litex-hub-pythondata-cpu-vexriscv | edge | testing | aarch64 |
| /usr/lib/python3.12/site-packages/pythondata_cpu_vexriscv/verilog/VexRiscv_MinDebug.v | py3-litex-hub-pythondata-cpu-vexriscv | edge | testing | aarch64 |
| /usr/lib/python3.12/site-packages/pythondata_cpu_vexriscv/verilog/VexRiscv_MinDebug.yaml | py3-litex-hub-pythondata-cpu-vexriscv | edge | testing | aarch64 |
| /usr/lib/python3.12/site-packages/pythondata_cpu_vexriscv/verilog/build.sbt | py3-litex-hub-pythondata-cpu-vexriscv | edge | testing | aarch64 |
| /usr/lib/python3.12/site-packages/pythondata_cpu_vexriscv/verilog/project/build.properties | py3-litex-hub-pythondata-cpu-vexriscv | edge | testing | aarch64 |
| /usr/lib/python3.12/site-packages/pythondata_cpu_vexriscv/verilog/project/plugins.sbt | py3-litex-hub-pythondata-cpu-vexriscv | edge | testing | aarch64 |
| /usr/lib/python3.12/site-packages/pythondata_cpu_vexriscv/verilog/src/main/scala/vexriscv/GenCoreDefault.scala | py3-litex-hub-pythondata-cpu-vexriscv | edge | testing | aarch64 |