Contents filter
File | Package | Branch | Repository | Architecture |
---|---|---|---|---|
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6-4.2.0.post435.dist-info/LICENSE | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6-4.2.0.post435.dist-info/METADATA | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6-4.2.0.post435.dist-info/RECORD | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6-4.2.0.post435.dist-info/WHEEL | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6-4.2.0.post435.dist-info/top_level.txt | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/__init__.py | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/.editorconfig | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/.github/ISSUE_TEMPLATE/bug.yaml | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/.github/ISSUE_TEMPLATE/task.yaml | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/.github/workflows/ci.yml | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/.gitignore | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/.gitlab-ci.yml | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/.gitlab-ci/core-v-verif-cva6.yml | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/.gitlab-ci/cva6.yml | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/.gitmodules | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/Bender.yml | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/CHANGELOG.md | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/CODEOWNERS | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/CONTRIBUTING.md | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/Flist.ariane | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/LICENSE | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/LICENSE.Berkeley | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/LICENSE.SiFive | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/Makefile | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/README.md | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/ariane.core | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/ci/build-riscv-gcc.sh | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/ci/build-riscv-tests.sh | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/ci/check-tests.sh | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/ci/default.config | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/ci/float.config | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/ci/get-torture.sh | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/ci/gitlab-ci-emul.sh | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/ci/install-dtc.sh | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/ci/install-fesvr.sh | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/ci/install-riscvpk.sh | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/ci/install-spike.sh | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/ci/install-verilator.sh | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/ci/make-tmp.sh | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/ci/path-setup.sh | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/ci/riscv-amo-tests.list | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/ci/riscv-asm-tests.list | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/ci/riscv-benchmarks.list | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/ci/riscv-fp-tests.list | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/ci/riscv-mul-tests.list | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/ci/setup.sh | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/ci/torture_make.patch | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/ci/travis-ci-emul.sh | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/common/local/techlib/fpga/rtl/SyncDpRam.sv | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/common/local/techlib/fpga/rtl/SyncSpRam.sv | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |