Contents filter
File | Package | Branch | Repository | Architecture |
---|---|---|---|---|
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/src/bootrom/bootrom_64.sv | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/src/bootrom/cv32a6.dts | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/src/bootrom/cv64a6.dts | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/src/bootrom/gen_rom.py | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/src/bootrom/linker.lds | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/src/bootrom/platform.h | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/src/bootrom/src/gpt.c | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/src/bootrom/src/gpt.h | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/src/bootrom/src/main.c | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/src/bootrom/src/sd.c | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/src/bootrom/src/sd.h | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/src/bootrom/src/smp.h | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/src/bootrom/src/spi.c | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/src/bootrom/src/spi.h | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/src/bootrom/src/uart.c | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/src/bootrom/src/uart.h | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/src/bootrom/startup.S | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/src/fan_ctrl.sv | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/src/genesysii.svh | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/src/kc705.svh | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/src/vc707.svh | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/src/vcu118.svh | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/xilinx/.gitignore | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/xilinx/ariane_xlnx_ip.yml | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/xilinx/common.mk | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/xilinx/xlnx_axi_clock_converter/Makefile | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/xilinx/xlnx_axi_clock_converter/tcl/run.tcl | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/xilinx/xlnx_axi_dwidth_converter/Makefile | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/xilinx/xlnx_axi_dwidth_converter/tcl/run.tcl | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/xilinx/xlnx_axi_dwidth_converter_dm_master/Makefile | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/xilinx/xlnx_axi_dwidth_converter_dm_master/tcl/run.tcl | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/xilinx/xlnx_axi_dwidth_converter_dm_slave/Makefile | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/xilinx/xlnx_axi_dwidth_converter_dm_slave/tcl/run.tcl | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/xilinx/xlnx_axi_gpio/Makefile | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/xilinx/xlnx_axi_gpio/tcl/run.tcl | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/xilinx/xlnx_axi_quad_spi/Makefile | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/xilinx/xlnx_axi_quad_spi/tcl/run.tcl | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/xilinx/xlnx_clk_gen/Makefile | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/xilinx/xlnx_clk_gen/tcl/run.tcl | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/xilinx/xlnx_ila/Makefile | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/xilinx/xlnx_ila/tcl/run.tcl | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/xilinx/xlnx_mig_7_ddr3/Makefile | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/xilinx/xlnx_mig_7_ddr3/mig_genesys2.prj | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/xilinx/xlnx_mig_7_ddr3/mig_kc705.prj | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/xilinx/xlnx_mig_7_ddr3/mig_vc707.prj | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/xilinx/xlnx_mig_7_ddr3/tcl/run.tcl | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/xilinx/xlnx_protocol_checker/Makefile | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/fpga/xilinx/xlnx_protocol_checker/tcl/run.tcl | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/include/traced_instr_pkg.sv | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/openpiton/ariane_verilog_wrap.sv | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | armhf |