Contents filter
File | Package | Branch | Repository | Architecture |
---|---|---|---|---|
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/tb/tb_cva6_icache/.gitignore | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/tb/tb_cva6_icache/Makefile | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/tb/tb_cva6_icache/hdl/mem_emul.sv | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/tb/tb_cva6_icache/hdl/tb.sv | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/tb/tb_cva6_icache/hdl/tb_pkg.sv | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/tb/tb_cva6_icache/hdl/tlb_emul.sv | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/tb/tb_cva6_icache/tb.list | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/tb/tb_cva6_icache/wave.do | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/tb/tb_serdiv/.gitignore | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/tb/tb_serdiv/Makefile | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/tb/tb_serdiv/hdl/tb.sv | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/tb/tb_serdiv/hdl/tb_div.sv | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/tb/tb_serdiv/hdl/tb_pkg.sv | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/tb/tb_serdiv/hdl/tb_rem.sv | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/tb/tb_serdiv/hdl/tb_udiv.sv | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/tb/tb_serdiv/hdl/tb_urem.sv | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/tb/tb_serdiv/tb.list | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/tb/tb_wb_dcache/.gitignore | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/tb/tb_wb_dcache/Makefile | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/tb/tb_wb_dcache/hdl/tb.sv | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/tb/tb_wb_dcache/tb.list | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/tb/tb_wb_dcache/wave.do | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/tb/tb_wt_axi_dcache/.gitignore | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/tb/tb_wt_axi_dcache/Makefile | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/tb/tb_wt_axi_dcache/hdl/tb.sv | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/tb/tb_wt_axi_dcache/tb.list | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/tb/tb_wt_axi_dcache/wave.do | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/tb/tb_wt_dcache/.gitignore | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/tb/tb_wt_dcache/Makefile | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/tb/tb_wt_dcache/hdl/tb.sv | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/tb/tb_wt_dcache/hdl/tb_mem.sv | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/tb/tb_wt_dcache/tb.list | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/tb/tb_wt_dcache/wave.do | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/corev_apu/tb/wave/wave_core.do | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/docs/.gitignore | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/docs/Makefile | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/docs/_static/ariane_overview.pdf | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/docs/_static/ariane_overview.png | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/docs/_static/bg.jpg | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/docs/_static/branch_prediction.pdf | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/docs/_static/branch_prediction.png | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/docs/_static/fpga_bd.pdf | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/docs/_static/fpga_bd.png | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/docs/_static/instr_realign.pdf | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/docs/_static/instr_realign.png | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/docs/_static/jekyll-dark.png | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/docs/_static/jekyll.png | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/docs/_static/ld_pipeline_diagram.svg | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/docs/_static/logonav.png | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |
/usr/lib/python3.12/site-packages/pythondata_cpu_cva6/system_verilog/docs/_static/lsu_blockdiagram.pdf | py3-litex-hub-pythondata-cpu-cva6 | edge | testing | aarch64 |