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/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p-0.0.post1883.dist-info/LICENSE py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p-0.0.post1883.dist-info/METADATA py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p-0.0.post1883.dist-info/RECORD py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p-0.0.post1883.dist-info/WHEEL py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p-0.0.post1883.dist-info/top_level.txt py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/__init__.py py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/.dir-locals.el py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/.github/ISSUE_TEMPLATE/bug.md py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/.github/ISSUE_TEMPLATE/config.yml py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/.github/ISSUE_TEMPLATE/enhancement.md py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/.github/ISSUE_TEMPLATE/question.md py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/.github/ISSUE_TEMPLATE/task.md py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/.gitignore py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/.gitlab-ci.yml py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/.travis.yml py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/Bender.yml py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/CONTRIBUTING.md py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/LICENSE py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/README.md py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/bhv/cv32e41p_apu_tracer.sv py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/bhv/cv32e41p_core_log.sv py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/bhv/cv32e41p_instr_trace.svh py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/bhv/cv32e41p_sim_clock_gate.sv py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/bhv/cv32e41p_tracer.sv py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/bhv/cv32e41p_wrapper.sv py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/bhv/include/cv32e41p_tracer_pkg.sv py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/ci/Jenkinsfile py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/ci/build-riscv-gcc.sh py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/ci/download-pulp-gcc.sh py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/ci/get-openocd.sh py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/ci/install-verilator.sh py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/ci/make-tmp.sh py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/ci/openocd-to-junit.py py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/ci/run-openocd-compliance.sh py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/ci/rv32tests-to-junit.py py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/ci/veri-run-openocd-compliance.sh py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/constraints/cv32e41p_core.sdc py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/cv32e41p_manifest.flist py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/docs/.gitignore py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/docs/Makefile py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/docs/images/Back_to_Back_Memory_Transaction.png py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/docs/images/Basic_Memory_Transaction.png py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/docs/images/CV32E40P_Block_Diagram.png py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/docs/images/CV32E40P_Block_Diagram.svg py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/docs/images/CV32E40P_Pipeline.png py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/docs/images/Events_PCCR_PCMR_PCER.png py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/docs/images/Slow_Response_Memory_Transaction.png py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/docs/images/blockdiagram.svg py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/docs/images/debug_halted.svg py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64
/usr/lib/python3.12/site-packages/pythondata_cpu_cv32e41p/system_verilog/docs/images/debug_running.svg py3-litex-hub-pythondata-cpu-cv32e41p edge testing x86_64