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/usr/share/yosys/lattice/dsp_map_18x18.v yosys edge testing aarch64
/usr/share/yosys/lattice/latches_map.v yosys edge testing aarch64
/usr/share/yosys/lattice/lutrams.txt yosys edge testing aarch64
/usr/share/yosys/lattice/lutrams_map.v yosys edge testing aarch64
/usr/share/yosys/mul2dsp.v yosys edge testing aarch64
/usr/share/yosys/nexus/arith_map.v yosys edge testing aarch64
/usr/share/yosys/nexus/brams.txt yosys edge testing aarch64
/usr/share/yosys/nexus/brams_map.v yosys edge testing aarch64
/usr/share/yosys/nexus/cells_map.v yosys edge testing aarch64
/usr/share/yosys/nexus/cells_sim.v yosys edge testing aarch64
/usr/share/yosys/nexus/cells_xtra.v yosys edge testing aarch64
/usr/share/yosys/nexus/dsp_map.v yosys edge testing aarch64
/usr/share/yosys/nexus/latches_map.v yosys edge testing aarch64
/usr/share/yosys/nexus/lrams.txt yosys edge testing aarch64
/usr/share/yosys/nexus/lrams_map.v yosys edge testing aarch64
/usr/share/yosys/nexus/lutrams.txt yosys edge testing aarch64
/usr/share/yosys/nexus/lutrams_map.v yosys edge testing aarch64
/usr/share/yosys/nexus/parse_init.vh yosys edge testing aarch64
/usr/share/yosys/pmux2mux.v yosys edge testing aarch64
/usr/share/yosys/python3/smtio.py yosys edge testing aarch64
/usr/share/yosys/python3/ywio.py yosys edge testing aarch64
/usr/share/yosys/quicklogic/common/cells_sim.v yosys edge testing aarch64
/usr/share/yosys/quicklogic/pp3/abc9_map.v yosys edge testing aarch64
/usr/share/yosys/quicklogic/pp3/abc9_model.v yosys edge testing aarch64
/usr/share/yosys/quicklogic/pp3/abc9_unmap.v yosys edge testing aarch64
/usr/share/yosys/quicklogic/pp3/cells_map.v yosys edge testing aarch64
/usr/share/yosys/quicklogic/pp3/cells_sim.v yosys edge testing aarch64
/usr/share/yosys/quicklogic/pp3/ffs_map.v yosys edge testing aarch64
/usr/share/yosys/quicklogic/pp3/latches_map.v yosys edge testing aarch64
/usr/share/yosys/quicklogic/pp3/lut_map.v yosys edge testing aarch64
/usr/share/yosys/quicklogic/qlf_k6n10f/TDP18K_FIFO.v yosys edge testing aarch64
/usr/share/yosys/quicklogic/qlf_k6n10f/arith_map.v yosys edge testing aarch64
/usr/share/yosys/quicklogic/qlf_k6n10f/bram_types_sim.v yosys edge testing aarch64
/usr/share/yosys/quicklogic/qlf_k6n10f/brams_map.v yosys edge testing aarch64
/usr/share/yosys/quicklogic/qlf_k6n10f/brams_sim.v yosys edge testing aarch64
/usr/share/yosys/quicklogic/qlf_k6n10f/cells_sim.v yosys edge testing aarch64
/usr/share/yosys/quicklogic/qlf_k6n10f/dsp_final_map.v yosys edge testing aarch64
/usr/share/yosys/quicklogic/qlf_k6n10f/dsp_map.v yosys edge testing aarch64
/usr/share/yosys/quicklogic/qlf_k6n10f/dsp_sim.v yosys edge testing aarch64
/usr/share/yosys/quicklogic/qlf_k6n10f/ffs_map.v yosys edge testing aarch64
/usr/share/yosys/quicklogic/qlf_k6n10f/libmap_brams.txt yosys edge testing aarch64
/usr/share/yosys/quicklogic/qlf_k6n10f/libmap_brams_map.v yosys edge testing aarch64
/usr/share/yosys/quicklogic/qlf_k6n10f/sram1024x18_mem.v yosys edge testing aarch64
/usr/share/yosys/quicklogic/qlf_k6n10f/ufifo_ctl.v yosys edge testing aarch64
/usr/share/yosys/sf2/arith_map.v yosys edge testing aarch64
/usr/share/yosys/sf2/cells_map.v yosys edge testing aarch64
/usr/share/yosys/sf2/cells_sim.v yosys edge testing aarch64
/usr/share/yosys/simcells.v yosys edge testing aarch64
/usr/share/yosys/simlib.v yosys edge testing aarch64
/usr/share/yosys/smtmap.v yosys edge testing aarch64